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  military and industrial temperature ranges idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter 1 june 2002 military and industrial temperature ranges the idt logo is a registered trademark of integrated device technology, inc. ? 2002 integrated device technology, inc. dsc-5503/5 features: ? std., a, and c grades ? low input and output 1a (max.) ? cmos power levels ? true ttl input and output compatibility: ?v oh = 3.3v (typ.) ?v ol = 0.3v (typ.) ? high drive outputs (-15ma i oh , 48ma i ol ) ? meets or exceeds jedec standard 18 specifications ? military product compliant to mil-std-883, class b and desc listed (dual marked) ? power off disable outputs permit "live insertion" ? available in the following packages: ? industrial: soic, qsop ? military: cerdip, lcc functional block diagram idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter description: the fct163t is a high-speed synchronous modulo-16 binary counter built using an advanced dual metal cmos technology. they are synchronously presettable for application in programmable dividers and have two types of count enable inputs plus a terminal count output for versatility in forming synchronous multi-stage counters. the fct163t has synchronous reset inputs that override counting and parallel loading and allow the outputs to be simultaneously reset on the rising edge of the clock. q 0 d cp d q q c d cp detail a detail a detail a pe cep cet cp sr q 0 q 1 q 2 q 3 q 0 detail a p 0 p 1 p 2 p 3 tc cp
military and industrial temperature ranges 2 idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter pin configuration symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +7 v v term (3) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to +120 ma absolute maximum ratings (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. no terminal voltage may exceed vcc by =0.5v unless otherwise noted. 2. inputs and vcc terminals only. 3. output and i/o terminals only. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. lcc top view cerdip/ soic/ qsop top view 1 2 3 4 5 7 9 6 8 10 11 12 13 14 15 16 17 18 19 20 nc q 0 q 1 q 2 q 3 c p s r c e p g n d n c p e c e t n c v c c t c index p 0 p 1 p 3 nc p 2 16 1 sr v cc 2 15 cp tc 3 14 p 0 q 0 4 13 q 1 p 1 512q 2 p 2 611q 3 p 3 710 cep cet 89 gnd pe note: 1. h = high voltage level l = low voltage level x = don?t care pin description pin names description cep count enable parallel input cet count enable trickle input c p clock pulse input (active rising edge) sr synchronous reset input (active low) p 0-3 parallel data inputs pe parallel enable input (active low) q 0-3 flip-flop outputs tc terminal count output function table (1) action on the rising sr pe cet cep clock edge(s) l x x x reset (clear) h l x x load (px qx) h h h h count (increment) h h l x no change (hold) h h x l no change (hold)
military and industrial temperature ranges idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter 3 symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level mil 2.7 ? ? v ind (5) 2?? v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current (4) v cc = max. v i = 2.7v ? ? 1a i il input low current (4) v cc = max. v i = 0.5v ? ? 1 i i input high current (4) v cc = max., v i = v cc (max.) ? ? 1a v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i os short circuit current v cc = max., v o = gnd (3) ?60 ?120 ?225 ma v oh output high voltage v cc = min i oh = ?6ma mil 2.4 3.3 ? v in = v ih or v il i oh = ?8ma ind v i oh = ?12ma mil 2 3 ? i oh = ?15ma ind v ol output low voltage v cc = min i ol = 32ma mil ? 0.3 0.5 v v in = v ih or v il i ol = 48ma ind v h input hysteresis ? ? 200 ? mv i cc quiescent power supply current v cc = max. ? 0.01 1 a v in = gnd or v cc dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 5%; military: t a = ?55c to +125c, v cc = 5.0v 10% notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. not more than one output should be tested at one time. duration of the test should not exceed one second. 4. the test limit for this parameter is 5a at t a = ?55c. 5. clock pin requires a minimum v ih of 2.5v
military and industrial temperature ranges 4 idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter power supply characteristics symbol parameter test conditions (1) min. typ. (2) max. unit ? i cc quiescent power supply current v cc = max. ? 0.5 2 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply current (4) v cc = max., outputs open v in = v cc ? 0.15 0.25 ma/ load mode v in = gnd mhz cep = cet = pe = gnd sr = v cc one input toggling 50% duty cycle i c total power supply current (6) v cc = max., outputs open v in = v cc ? 1.5 3.5 ma load mode v in = gnd f cp = 10mhz 50% duty cycle cep = cet = pe = gnd v in = 3.4v ? 2 5.5 sr = v cc v in = gnd one bit toggling at f i = 5mhz 50% duty cycle v cc = max., outputs open v in = v cc ? 3.8 7.3 (5) load mode v in = gnd f cp = 10mhz 50% duty cycle cep = cet = pe = gnd v in = 3.4v ? 5 12.3 (5) sr = v cc v in = gnd four bits toggling at f i = 5mhz 50% duty cycle notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f cp/ 2 + f i n i ) i cc = quiescent current ? i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
military and industrial temperature ranges idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter 5 switching characteristics over operating range 54fct163t 54/74fct163at 54/74fct163ct mil. ind. mil. ind. mil. symbol parameter condition (1) min . (2) max . min . (2) max . min . (2) max . min . (2) max . min . (2) max . unit t plh propagation delay c l = 50pf 2 11.5 2 7.2 2 7.5 2 5.8 2 6.3 ns t phl cp to qx ( pe input high) r l = 500 ? t plh propagation delay 2 10 2 6.2 2 6.5 2 5.8 2 6.3 ns t phl cp to qx ( pe input low) t plh propagation delay 2 16.5 2 9.8 2 10.8 2 7.4 2 8.3 ns t phl cp to tc t plh propagation delay 1.5 9 1.5 5.5 1.5 5.9 1.5 5.2 1.5 5.6 ns t phl cet to tc t su set-up time high or low 5.5 ? 4 ? 4.5 ? 4 ? 4.5 ? ns px to cp t h hold time high or low 2 ? 1.5 ? 2 ? 1.5 ? 2 ? ns px to cp t su set-up time high or low 13.5 ? 9.5 ? 11.5 ? 9.5 ? 11.5 ? ns pe or sr to cp t h hold time high or low 1.5 ? 1.5 ? 1.5 ? 1.5 ? 1.5 ? ns pe or sr to cp t su set-up time high or low 13 ? 9.5 ? 11 ? 9.5 ? 11 ? ns cep or cet to cp t h hold time high or low 0 ? 0 ? 0 ? 0 ? 0 ? ns cep or cet to cp t w cp pulse width (load) 5 ? 4 (3) ?4 (3) ?4 (3) ?4 (3) ?ns high or low t w cp pulse width (count) 8 ? 6 ? 7 ? 6 ? 7 ? ns high or low notes: 1. see test circuits and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this limit is guaranteed but not tested.
military and industrial temperature ranges 6 idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter pulse generator r t d.u.t . v cc v in c l v out 50pf 500 ? 500 ? 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. octal link octal link octal link octal link octal link test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
military and industrial temperature ranges idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter 7 ordering information idt xx temp. range xxxx device type xx package x process so q industrial options small outline ic quarter-size small outline package synchronous presettable binary counter 54 74 ? 55 c to +125 c ? 40 c to +85 c d l military options cerdip leadless chip carrier blank b industrial mil-std-883, class b fct 163t 163at 163ct corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com 6/20/2002 updated as per pdns logic-00-07 and logic-01-04 data sheet document history


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